MC3610 Datasheet, PDF (28/67 Pages) List of Unclassifed Manufacturers – Axis Accelerometer

MC3610 3-Axis Accelerometer
Preliminary Datasheet
7.5 SPI PHYSICAL INTERFACE
The SPI slave interface operates at a speed of up to 2 MHz.
The device always operates as an SPI slave. An SPI master must initiate all communication
and data transfers and generate the clock that synchronizes the data transfer. The SPI
interface operates in four-wire mode.
Pin
Function
Direction
Default Level
Comments
SCK_SCL SPI clock pin
Input Only
Logic ‘1’ (Idle) 2 MHz max speed
DIN_SDA SPI serial data in
Input Only
X (Don’t care)
CSN
SPI chip select
Input Only
Logic ‘1’ (Idle) Active low during
SPI bus activity
DOUT_A1 SPI serial data out Output Only
X (Don’t care)
Table 11. SPI Physical Interface
7.6 SPI PROTOCOL
The general protocol for the SPI interface is shown in the figure below. Each read or write
transaction always requires a minimum of 24 cycles of the SCK_SCL. The falling edge of CSN
initiates the start of the SPI bus cycle. When the SPI master is writing data via the DIN_SDA
pin, data may change when the SCK_SCL is low, and must be stable on the rising edge.
Similarly, output data written to the SPI master is shifted out on the DOUT_A1 pin on the falling
edge of SCK_SCL and can be latched by the master on the rising edge of SCK_SCL. Serial
data in or out of the device is always MSB first.
CSN
SCK_SCL
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
DIN_SDA
R/W A6 A5 A4 A3 A2 A1 A0
0
0
0
0
0
0
0
A7 DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0
DOUT_A1
Figure 14. General SPI Protocol
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
7.7 SPI REGISTER ADDRESSING
The total available register address space is 128 locations, so a total of 7-address bits are
required for each SPI bus cycle. The first byte of the transaction is the command/address byte.
During clock ‘1’, the R/W# bit is set to ‘0’ for a write cycle or ‘1’ for a read cycle. Clocks 2 to 8
specify the address to be written to or read from. Note that during clocks 2 and 3, and 9-16,
these bits must be driven to ‘0’ for the address to be correctly decoded.
mCube Proprietary.
APS-048-0042v1.6
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