MC3610 Datasheet, PDF(33/67 Page) List of Unclassifed Manufacturers

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MC3610 Datasheet, PDF (33/67 Pages) List of Unclassifed Manufacturers – Axis Accelerometer

◁

MC3610 3-Axis Accelerometer

Preliminary Datasheet

Addr

0x21

Name

DMY

Description

Drive Motion Y

Bit 7

RESV

Bit 6

RESV

Bit 5

RESV

Bit 4

RESV

Bit 3

DNY

Bit 2

DPY

Bit 1

RESV

Bit 0

RESV

POR

Value

R/W5

0x00 W

0x22

DMZ

0x23-0x24

0x25

PMC

0x26-0x29

0x2A

XOFFL

0x2B

XOFFH

0x2C

YOFFL

0x2D

YOFFH

0x2E

ZOFFL

0x2F

ZOFFH

0x30

XGAIN

Drive Motion Z

RESV

DNZ

DPZ

RESV

0x00 W

RESERVED

Precision Mode

Control

RESV

0x00 W

RESERVED

X-Offset

LSB Register

XOFF[7] XOFF[6] XOFF[5] XOFF[4] XOFF[3] XOFF[2] XOFF[1] XOFF[0] Per chip W

X-Offset

MSB Register

XGAIN[8] XOFF[14] XOFF[13] XOFF[12] XOFF[11] XOFF[10] XOFF[9] XOFF[8] Per chip W

Y-Offset

LSB Register

YOFF[7] YOFF[6] YOFF[5] YOFF[4] YOFF[3] YOFF[2] YOFF[1] YOFF[0] Per chip W

Y-Offset

MSB Register

YGAIN[8] YOFF[14] YOFF[13] YOFF[12] YOFF[11] YOFF[10] YOFF[9] YOFF[8] Per chip W

Z-Offset

LSB Register

ZOFF[7] ZOFF[6] ZOFF[5] ZOFF[4] ZOFF[3] ZOFF[2] ZOFF[1] ZOFF[0] Per chip W

Z-Offset

MSB Register

ZGAIN[8] ZOFF[14] ZOFF[13] ZOFF[12] ZOFF[11] ZOFF[10] ZOFF[9] ZOFF[8] Per chip W

X Gain Register XGAIN[7] XGAIN[6] XGAIN[5] XGAIN[4] XGAIN[3] XGAIN[2] XGAIN[1] XGAIN[0] Per chip W

0x31

YGAIN

Y Gain Register YGAIN[7] YGAIN[6] YGAIN[5] YGAIN[4] YGAIN[3] YGAIN[2] YGAIN[1] YGAIN[0] Per chip W

0x32

ZGAIN

Z Gain Register ZGAIN[7] ZGAIN[6] ZGAIN[5] ZGAIN[4] ZGAIN[3] ZGAIN[2] ZGAIN[1] ZGAIN[0] Per chip W

0x33 to 0x34

0x35

FEPX

X-Front End

LSB Register

FEPX[7]

FEPX[6]

FEPX[5]

RESERVED

FEPX[4] FEPX[3]

FEPX[2]

FEPX[1]

FEPX[0] Per chip R

0x36

FENX

X- Front End

MSB Register

FENX[7] FENX[6] FENX[5] FENX[4] FENX[3] FENX[2] FENX[1] FENX[0] Per chip R

0x37

FEPY

Y- Front End

LSB Register

FEPY[7] FEPY[6] FEPY[5] FEPY[4] FEPY[3] FEPY[2] FEPY[1] FEPY[0] Per chip R

0x38

FENY

Y- Front End

MSB Register

FENY[7] FENY[6] FENY[5] FENY[4] FENY[3] FENY[2] FENY[1] FENY[0] Per chip R

0x39

FEPZ

Z- Front End

LSB Register

FEPZ[7] FEPZ[6] FEPZ[5] FEPZ[4] FEPZ[3] FEPZ[2] FEPZ[1] FEPZ[0] Per chip R

0x3A

FENZ

Z- Front End

MSB Register

FENZ[7] FENZ[6] FENZ[5] FENZ[4] FENZ[3] FENZ[2] FENZ[1] FENZ[0] Per chip R

0x3B

Mode Setting

0x3C to 0x7F

Table 12. Register Summary7

MS[7]

MS[6]

MS[5]

MS[4]

MS[3]

RESERVED

MS[2]

MS[1]

MS[0] Per chip R

7 No registers are updated with new event status or samples while a SPI cycle (pin CSN low) or I2C cycle is in

process.

mCube Proprietary.

APS-048-0042v1.6

33 / 67

▷