English
Language : 

MC3610 Datasheet, PDF (32/67 Pages) List of Unclassifed Manufacturers – Axis Accelerometer
MC3610 3-Axis Accelerometer
Preliminary Datasheet
8.1 Register Summary
Addr
Name
Description
0x00
EXT_STAT_1
Extended Status
Register 1
Bit 7
RESV
Bit 6
RESV
Bit 5
RESV
0x01
EXT_STAT_2
Extended Status
Register 2
SNIFF_
DETECT
SNIFF_EN
OTP_EN
Bit 4
RESV
RESV
Bit 3
Bit 2
I2C_AD0 RESV
Bit 1
RESV
Bit 0
RESV
RESV
1
PD_CLK_ OVR_
STAT
DATA
POR
Value
R/W5
0x00 R
0x04 R
0x02 XOUT_LSB
XOUT_LSB
XOUT[7] XOUT[6] XOUT[5] XOUT[4] XOUT[3] XOUT[2] XOUT[1] XOUT[0] 0x00 R
0x03 XOUT_MSB XOUT_MSB XOUT[15] XOUT[14] XOUT[13] XOUT[12] XOUT[11] XOUT[10] XOUT[9] XOUT[8] 0x00 R
0x04 YOUT_LSB
YOUT_LSB
YOUT[7] YOUT[6] YOUT[5] YOUT[4] YOUT[3] YOUT[2] YOUT[1] YOUT[0] 0x00 R
0x05 YOUT_MSB YOUT_MSB YOUT[15] YOUT[14] YOUT[13] YOUT[12] YOUT[11] YOUT[10] YOUT[9] YOUT[8] 0x00 R
0x06 ZOUT_LSB
ZOUT_LSB
ZOUT[7] ZOUT[6] ZOUT[5] ZOUT[4] ZOUT[3] ZOUT[2] ZOUT[1] ZOUT[0] 0x00 R
0x07 ZOUT_MSB
ZOUT_MSB
ZOUT[15] ZOUT[14] ZOUT[13] ZOUT[12] ZOUT[11] ZOUT[10] ZOUT[9] ZOUT[8] 0x00 R
0x08
STATUS_1
Status Register 1
INT_PEND
FIFO_
THRESH
FIFO_FULL
FIFO_
EMPTY
NEW_
DATA
MODE[2] MODE[1] MODE[0]
0x00
R
0x09 STATUS_2 Status Register 2
0x0A – 0x0F
RESV
INT_FIFO_ INT_FIFO_ INT_FIFO_
THRESH FULL
EMPTY
INT_ACQ
INT_WAKE
RESV
RESERVED
RESV
0x00 R
0x10 MODE_C
Mode Control
TRIG Z_AXIS_PD Y_AXIS_PD X_AXIS_PD RESV MCTRL[2] MCTRL[1] MCTRL[0] 0x00 W
0x11 Rate Register 1 Rate Control 1
RR[7]
RR[6]
RR[5]
RR[4]
RR[3]
RR[2]
RR[1]
RR[0]
0x00 W
0x12 SNIFF_C
Sniff Control
STB_RATE STB_RATE STB_RATE
[2]
[1]
[0]
06
SNIFF_SR SNIFF_SR SNIFF_SR SNIFF_SR
[3]
[2]
[1]
[0]
0x00
W
0x13 SNIFFTH_C
Sniff Threshold
I2C_
Control
MODE_EN
RESV
RESV
SNIFF_TH_ SNIFF_TH_ SNIFF_TH_ SNIFF_TH_ SNIFF_TH_
P[4]
P[3]
P[2]
P[1]
P[0]
0x00
W
0x14
0x15
IO_C
IO Control
SPI_
RESV
MODE_EN
RESV
RESV
RANGE_C
Range Resolution
Control
RESV RANGE [2] RANGE [1] RANGE [0]
RESV
RESV
RESV
RES[2]
RESV
RES[1]
RESV
RES[0]
0x00 W
0x00 W
0x16 FIFO_C
FIFO Control
FIFO_
RESET
FIFO_EN
FIFO_
MODE
FIFO_TH[4] FIFO_TH[3] FIFO_TH[2] FIFO_TH[1] FIFO_TH[0]
0x00
W
0x17 INTR_C
0x18-0x1F
0x20
DMX
Interrupt Control
Drive Motion X
RESV
INT_FIFO_ INT_FIFO_ INT_FIFO_
THRESH FULL
EMPTY
INT_ACQ INT_ WAKE
IAH
RESERVED
RESV
RESV
RESV
RESV
DNX
DPX
RESV
IPP
RESV
0x00 R
0x00 W
5 ‘R’ registers are read-only, via external I2C or SPI access. ‘W’ registers are read-write, via external I2C or SPI access.
6 Software must always write a ‘0’ to this bit.
mCube Proprietary.
APS-048-0042v1.6
© 2015 mCube Inc. All rights reserved.
32 / 67