LM3S101_0610 Datasheet, PDF (3/300 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S101 Data Sheet
Table of Contents
Legal Disclaimers and Trademark Information.............................................................................. 2
Revision History ............................................................................................................................. 14
About This Document..................................................................................................................... 15
Audience........................................................................................................................................................... 15
About This Manual............................................................................................................................................ 15
Related Documents .......................................................................................................................................... 15
Documentation Conventions............................................................................................................................. 15
1.
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.5
Architectural Overview ....................................................................................................... 18
Product Features ................................................................................................................................. 18
Target Applications .............................................................................................................................. 20
High-Level Block Diagram ................................................................................................................... 21
Functional Overview ............................................................................................................................ 22
ARM Cortex™-M3 ............................................................................................................................... 22
Motor Control Peripherals .................................................................................................................... 22
Analog Peripherals .............................................................................................................................. 22
Serial Communications Peripherals..................................................................................................... 23
System Peripherals.............................................................................................................................. 23
Memory Peripherals............................................................................................................................. 24
Additional Features .............................................................................................................................. 25
Hardware Details ................................................................................................................................. 25
System Block Diagram ........................................................................................................................ 26
2.
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
ARM Cortex-M3 Processor Core........................................................................................ 27
Block Diagram ..................................................................................................................................... 28
Functional Description ......................................................................................................................... 28
Serial Wire and JTAG Debug .............................................................................................................. 28
Embedded Trace Macrocell (ETM) ...................................................................................................... 29
Trace Port Interface Unit (TPIU) .......................................................................................................... 29
ROM Table .......................................................................................................................................... 29
Memory Protection Unit (MPU) ............................................................................................................ 29
Nested Vectored Interrupt Controller (NVIC) ....................................................................................... 29
3. Memory Map ........................................................................................................................ 30
4. Interrupts ............................................................................................................................. 32
5.
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG Interface .................................................................................................................... 35
Block Diagram ..................................................................................................................................... 36
Functional Description ......................................................................................................................... 36
JTAG Interface Pins............................................................................................................................. 37
JTAG TAP Controller ........................................................................................................................... 38
Shift Registers ..................................................................................................................................... 39
Operational Considerations ................................................................................................................. 39
Initialization and Configuration............................................................................................................. 40
Register Descriptions........................................................................................................................... 41
Instruction Register (IR) ....................................................................................................................... 41
Data Registers ..................................................................................................................................... 43
6. System Control.................................................................................................................... 45
6.1 Functional Description ......................................................................................................................... 45
6.1.1 Device Identification............................................................................................................................. 45
October 5, 2006
3
Preliminary