LM3S101_0610 Datasheet, PDF (277/300 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S101 Data Sheet
Table 15-2. Signals by Signal Name (Sheet 2 of 2)
Signal Name
PC2
PC3
RST
SSIClk
SSIFss
SSIRx
SSITx
SWCLK
SWDIO
SWO
TCK
TDI
TDO
TMS
TRST
U0Rx
U0Tx
VDD
VDD
VDD
Pin
Number
26
25
5
13
14
15
16
28
27
25
28
26
25
27
1
11
12
7
17
22
Pin
Type
I/O
I/O
I
I/O
I/O
I
O
I
I/O
O
I
I
O
I
I
I
O
-
-
-
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Power
Power
Power
Description
GPIO port C bit 2.
GPIO port C bit 3.
System reset input.
SSI clock reference (input when in slave mode and output in
master mode).
SSI frame enable (input for an SSI slave device and output for an
SSI master device).
SSI receive data input.
SSI transmit data output.
Serial-wire clock reference input.
Serial-wire debug input/output.
Serial-wire output.
JTAG scan clock reference input.
JTAG scan data input.
JTAG scan test output.
JTAG mode select input.
JTAG TAP reset input.
UART0 receive data input.
UART0 transmit data output.
Positive supply for logic and I/O pins.
Positive supply for logic and I/O pins.
Positive supply for logic and I/O pins.
October 5, 2006
277
Preliminary