CC2510FX Datasheet, PDF (70/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

CC2510Fx / CC2511Fx
The ADC can be configured to use the
general-purpose I/O pin P2_0 as an external
trigger to start conversions. P2_0 must be
configured as a general-purpose I/O in input
mode, when being used for ADC external
trigger.
Refer to section 13.7 on page 127 for a
detailed description of use of the ADC.
13.1.6 Debug interface
Port pins P2_1 and P2_2 are used for debug
data and clock signals, respectively. These are
shown as DD (debug data) and DC (debug
clock) in Table 41. When the debug interface
is in use, P2DIR should select these pins as
inputs. The state of P2SEL is overridden by the
debug interface. Also, the direction is
overridden when the chip changes the
direction to supply the external host with data.
13.1.7 32.768 kHz XOSC input
Ports P2_3 and P2_4 are used to connect an
external 32.768 kHz crystal. These port pins
will be used by the 32.768 kHz crystal
oscillator when CLKCON.OSC32K is low,
regardless of register settings. The port pins
will be set in analog mode when
CLKCON.OSC32K is low.
13.1.8 Unused I/O pins
Unused I/O pins should have a defined level
and not be left floating. One way to do this is to
leave the pin unconnected and configure the
pin as a general purpose I/O input with pull-up
resistor. This is also the state of all pins during
reset (except P1_0 and P1_1 which do not
have pull-up/pull-down resistors). Alternatively
the pin can be configured as a general
purpose I/O output. In both cases the pin
should not be connected directly to VDD or
GND in order to avoid excessive power
consumption.
13.1.9 IOC registers
The registers for the IO ports are described in
this section. The registers are:
• P0 Port 0
• P1 Port 1
• P2 Port 2
• PERCFG Peripheral control register
• ADCCFG ADC input configuration
register
• P0SEL Port 0 function select register
• P1SEL Port 1 function select register
• P2SEL Port 2 function select register
• P0DIR Port 0 direction register
• P1DIR Port 1 direction register
• P2DIR Port 2 direction register
• P0INP Port 0 input mode register
• P1INP Port 1 input mode register
• P2INP Port 2 input mode register
• P0IFG Port 0 interrupt status flag
register
• P1IFG Port 1 interrupt status flag
register
• P2IFG Port 2 interrupt status flag
register
• PICTL Interrupt mask and edge
register
• P1IEN Port 1 interrupt mask register
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 70 of 252