CC2510FX Datasheet, PDF (222/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

CC2510Fx / CC2511Fx
Bit Field Name
7:0 SYNC[7:0]
0xDF01: SYNC0 – Sync word, low byte
Reset
R/W Description
0x91
R/W 8 LSB of 16-bit sync word
Bit Field Name
7:0 PACKET_LENGTH
0xDF02: PKTLEN – Packet length
Reset
R/W Description
0xFF
R/W Indicates the packet length when fixed length
packets are enabled. If variable length packets are
used, this value indicates the maximum length
packets allowed.
0xDF03: PKTCTRL1 – Packet automation control
Bit Field Name
Reset R/W Description
7:5 PQT[2:0]
4:3 -
2 APPEND_STATUS
1:0 ADR_CHK[1:0]
000
R/W Preamble quality estimator threshold. The preamble quality
estimator increases an internal counter by one each time a bit is
received that is different from the previous bit, and decreases the
counter by 4 each time a bit is received that is the same as the
last bit. The counter saturates at 0 and 31.
A threshold of 4·PQT for this counter is used to gate sync word
detection. When PQT=0 a sync word is always accepted.
00
R0 Reserved
1
R/W When enabled, two status bytes will be appended to the payload
of the packet. The status bytes contain RSSI and LQI values, as
well as the CRC OK flag.
00
R/W Controls address check configuration of received packages.
Setting Address check configuration
0 (00) No address check
1 (01) Address check, no broadcast
2 (10) Address check, 0 (0x00) broadcast
3 (11) Address check, 0 (0x00) and 255 (0xFF) broadcast
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 222 of
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