LM3S8730 Datasheet, PDF (5/502 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8730 Microcontroller
10.2 Functional Description ............................................................................................................. 195
10.2.1 GPTM Reset Conditions .......................................................................................................... 195
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 195
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 197
10.3 Initialization and Configuration ................................................................................................. 201
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 201
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 202
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 202
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 203
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 203
10.3.6 16-Bit PWM Mode ................................................................................................................... 204
10.4 Register Map .......................................................................................................................... 204
10.5 Register Descriptions .............................................................................................................. 205
11 Watchdog Timer ............................................................................................................... 230
11.1 Block Diagram ........................................................................................................................ 230
11.2 Functional Description ............................................................................................................. 230
11.3 Initialization and Configuration ................................................................................................. 231
11.4 Register Map .......................................................................................................................... 231
11.5 Register Descriptions .............................................................................................................. 232
12 Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 253
12.1 Block Diagram ........................................................................................................................ 254
12.2 Functional Description ............................................................................................................. 254
12.2.1 Transmit/Receive Logic ........................................................................................................... 254
12.2.2 Baud-Rate Generation ............................................................................................................. 255
12.2.3 Data Transmission .................................................................................................................. 256
12.2.4 Serial IR (SIR) ......................................................................................................................... 256
12.2.5 FIFO Operation ....................................................................................................................... 257
12.2.6 Interrupts ................................................................................................................................ 257
12.2.7 Loopback Operation ................................................................................................................ 258
12.2.8 IrDA SIR block ........................................................................................................................ 258
12.3 Initialization and Configuration ................................................................................................. 258
12.4 Register Map .......................................................................................................................... 259
12.5 Register Descriptions .............................................................................................................. 260
13 Synchronous Serial Interface (SSI) ................................................................................ 294
13.1 Block Diagram ........................................................................................................................ 294
13.2 Functional Description ............................................................................................................. 294
13.2.1 Bit Rate Generation ................................................................................................................. 295
13.2.2 FIFO Operation ....................................................................................................................... 295
13.2.3 Interrupts ................................................................................................................................ 295
13.2.4 Frame Formats ....................................................................................................................... 296
13.3 Initialization and Configuration ................................................................................................. 303
13.4 Register Map .......................................................................................................................... 304
13.5 Register Descriptions .............................................................................................................. 305
14 Inter-Integrated Circuit (I²C) Interface ............................................................................ 331
14.1 Block Diagram ........................................................................................................................ 331
14.2 Functional Description ............................................................................................................. 331
14.2.1 I²C Bus Functional Overview .................................................................................................... 332
September 02, 2007
5
Preliminary