LM3S8730 Datasheet, PDF (457/502 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8730 Microcontroller
Pin Number
99
100
Pin Name
NC
NC
Pin Type
-
-
Buffer Type Description
-
No connect
-
No connect
Table 18-2. Signals by Signal Name
Pin Name
CAN0Rx
CAN0Tx
CCP0
CCP1
CMOD0
Pin Number
10
11
66
34
65
Pin Type
I
O
I/O
I/O
I/O
CMOD1
76
I/O
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA
9
-
15
-
21
-
33
-
39
-
45
-
54
-
57
-
63
-
69
-
82
-
87
-
94
-
4
-
GNDA
97
-
GNDPHY
GNDPHY
GNDPHY
GNDPHY
HIB
I2C0SCL
I2C0SDA
41
I
42
I
85
I
86
I
51
O
70
I/O
71
I/O
Buffer Type Description
TTL
CAN module 0 receive
TTL
CAN module 0 transmit
TTL
Capture/Compare/PWM 0
TTL
Capture/Compare/PWM 1
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
TTL
GND of the Ethernet PHY
TTL
GND of the Ethernet PHY
TTL
GND of the Ethernet PHY
TTL
GND of the Ethernet PHY
TTL
An output that indicates the processor is in
hibernate mode.
OD
I2C module 0 clock
OD
I2C module 0 data
September 02, 2007
457
Preliminary