LM3S8730 Datasheet, PDF (455/502 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8730 Microcontroller
Pin Number
45
46
47
48
49
50
51
52
Pin Name
GND
TXON
PF0
OSC0
OSC1
WAKE
HIB
XOSC0
53
XOSC1
54
GND
55
VBAT
56
VDD
57
GND
58
MDIO
59
PF3
LED0
60
PF2
LED1
61
PF1
62
VDD25
63
GND
64
RST
65
CMOD0
66
PB0
CCP0
67
PB1
68
VDD
69
GND
70
PB2
I2C0SCL
71
PB3
I2C0SDA
Pin Type
-
O
I/O
I
O
I
O
I
O
-
-
-
-
I/O
I/O
O
I/O
O
I/O
-
-
I
I/O
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
Buffer Type Description
Power Ground reference for logic and I/O pins.
Analog TXON of the Ethernet PHY
TTL
GPIO port F bit 0
Analog
Main oscillator crystal input or an external
clock reference input.
Analog Main oscillator crystal output.
OD
An external input that brings the processor out
of hibernate mode when asserted.
TTL
An output that indicates the processor is in
hibernate mode.
Analog
Hibernation Module oscillator crystal input or
an external clock reference input. Note that
this is either a 4.19-MHz crystal or a
32.768-kHz oscillator for the Hibernation
Module RTC. See the CLKSEL bit in the
HIBCTL register.
Analog Hibernation Module oscillator crystal output.
Power Ground reference for logic and I/O pins.
Power
Power source for the Hibernation Module. It
is normally connected to the positive terminal
of a battery and serves as the battery
backup/Hibernation Module power-source
supply.
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
TTL
MDIO of the Ethernet PHY
TTL
GPIO port F bit 3
TTL
MII LED 0
TTL
GPIO port F bit 2
TTL
MII LED 1
TTL
GPIO port F bit 1
Power
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Power Ground reference for logic and I/O pins.
TTL
System reset input.
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
GPIO port B bit 0
TTL
Capture/Compare/PWM 0
TTL
GPIO port B bit 1
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
TTL
GPIO port B bit 2
OD
I2C module 0 clock
TTL
GPIO port B bit 3
OD
I2C module 0 data
September 02, 2007
455
Preliminary