LM3S8730 Datasheet, PDF (348/502 Pages) List of Unclassifed Manufacturers – Microcontroller

Inter-Integrated Circuit (I²C) Interface
Bit/Field
1
0
Name
START
RUN
Type
WO
WO
Reset
0
0
Description
Generate START
When set, causes the generation of a START or repeated START
condition. See field decoding in Table 14-3 on page 348.
I²C Master Enable
When set, allows the master to send or receive data. See field decoding
in Table 14-3 on page 348.
Table 14-3. Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3)
Current I2CMSA[0]
State
R/S
Idle
0
ACK
X^a
I2CMCS[3:0]
STOP START
0
1
RUN
1
Description
START condition followed by SEND (master goes to the
Master Transmit state).
0
X
1
11
START condition followed by a SEND and STOP
condition (master remains in Idle state).
1
0
0
11
START condition followed by RECEIVE operation with
negative ACK (master goes to the Master Receive state).
1
0
1
11
START condition followed by RECEIVE and STOP
condition (master remains in Idle state).
1
1
0
11
START condition followed by RECEIVE (master goes to
the Master Receive state).
1
1
1
11
Illegal.
All other combinations not listed are non-operations. NOP.
Master
X
Transmit
X
0
0
1 SEND operation (master remains in Master Transmit
state).
X
X
1
0
0 STOP condition (master goes to Idle state).
X
X
1
0
1 SEND followed by STOP condition (master goes to Idle
state).
0
X
0
1
1 Repeated START condition followed by a SEND (master
remains in Master Transmit state).
0
X
1
1
1 Repeated START condition followed by SEND and STOP
condition (master goes to Idle state).
1
0
0
1
1 Repeated START condition followed by a RECEIVE
operation with a negative ACK (master goes to Master
Receive state).
1
0
1
1
1 Repeated START condition followed by a SEND and
STOP condition (master goes to Idle state).
1
1
0
1
1 Repeated START condition followed by RECEIVE (master
goes to Master Receive state).
1
1
1
1
1 Illegal.
All other combinations not listed are non-operations. NOP.
348
September 02, 2007
Preliminary