LM3S8730 Datasheet, PDF (39/502 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8730 Microcontroller
3 Memory Map
The memory map for the LM3S8730 controller is provided in Table 3-1 on page 39.
In this manual, register addresses are given as a hexadecimal increment, relative to the module’s
base address as shown in the memory map. See also Chapter 4, “Memory Map” in the ARM®
Cortex™-M3 Technical Reference Manual.
Important: In Table 3-1 on page 39, addresses not listed are reserved.
Table 3-1. Memory Map^a
Start
End
Memory
0x0000.0000
0x2000.0000
0x2010.0000
0x2200.0000
0x2400.0000
FiRM Peripherals
0x4000.0000
0x4000.4000
0x4000.5000
0x4000.6000
0x4000.7000
0x4000.8000
0x4000.C000
0x4000.D000
Peripherals
0x4002.0000
0x4002.0800
0x4002.4000
0x4002.5000
0x4002.6000
0x4003.0000
0x4003.1000
0x4003.2000
0x4003.3000
0x4004.0000
0x4004.8000
0x400F.C000
0x400F.D000
0x400F.E000
0x4200.0000
0x0001.FFFF
0x2000.FFFF
0x21FF.FFFF
0x23FF.FFFF
0x3FFF.FFFF
0x4000.0FFF
0x4000.4FFF
0x4000.5FFF
0x4000.6FFF
0x4000.7FFF
0x4000.8FFF
0x4000.CFFF
0x4000.DFFF
0x4002.07FF
0x4002.0FFF
0x4002.4FFF
0x4002.5FFF
0x4002.6FFF
0x4003.0FFF
0x4003.1FFF
0x4003.2FFF
0x4003.3FFF
0x4004.0FFF
0x4004.8FFF
0x400F.CFFF
0x400F.DFFF
0x400F.EFFF
0x43FF.FFFF
Description
On-chip flash ^b
Bit-banded on-chip SRAM^c
Reserved non-bit-banded SRAM space
Bit-band alias of 0x2000.0000 through 0x200F.FFFF
Reserved non-bit-banded SRAM space
For details on
registers, see
page ...
134
134
-
130
-
Watchdog timer
232
GPIO Port A
159
GPIO Port B
159
GPIO Port C
159
GPIO Port D
159
SSI0
305
UART0
260
UART1
260
I2C Master 0
344
I2C Slave 0
357
GPIO Port E
159
GPIO Port F
159
GPIO Port G
159
Timer0
205
Timer1
205
Timer2
205
Timer3
205
CAN0 Controller
379
Ethernet Controller
415
Hibernation Module
117
Flash control
134
System control
61
Bit-banded alias of 0x4000.0000 through 0x400F.FFFF
-
September 02, 2007
39
Preliminary