LM3S8730 Datasheet, PDF (421/502 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8730 Microcontroller
Register 5: Ethernet MAC Transmit Control (MACTCTL), offset 0x00C
This register enables software to configure the transmit module, and control frames are placed onto
the physical medium.
Ethernet MAC Transmit Control (MACTCTL)
Base 0x4004.8000
Offset 0x00C
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
DUPLEX reserved CRC PADEN TXEN
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:5
4
3
2
1
0
Name
reserved
DUPLEX
reserved
CRC
PADEN
TXEN
Type
RO
R/W
RO
R/W
R/W
R/W
Reset
0x0
0x0
0x0
0x0
0x0
0x0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Enable Duplex Mode
When set, enables Duplex mode, allowing simultaneous transmission
and reception.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Enable CRC Generation
When set, enables the automatic generation of the CRC and the
placement at the end of the packet. If this bit is not set, the frames placed
in the TX FIFO will be sent exactly as they are written into the FIFO.
Enable Packet Padding
When set, enables the automatic padding of packets that do not meet
the minimum frame size.
Enable Transmitter
When set, enables the transmitter. When this bit is 0, the transmitter is
disabled.
September 02, 2007
421
Preliminary