LM3S8730 Datasheet, PDF (460/502 Pages) List of Unclassifed Manufacturers – Microcontroller

Signal Tables
Pin Name
VCCPHY
VCCPHY
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD25
VDD25
VDD25
VDD25
VDDA
VDDA
WAKE
XOSC0
XOSC1
XTALNPHY
XTALPPHY
Pin Number
83
84
8
20
32
44
56
68
81
93
14
38
62
88
3
98
50
52
53
17
16
Pin Type
I
I
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
O
I
O
Buffer Type Description
TTL
VCC of the Ethernet PHY
TTL
VCC of the Ethernet PHY
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power Positive supply for I/O and some logic.
Power
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Power
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Power
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Power
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Power
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
Power
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
OD
An external input that brings the processor out
of hibernate mode when asserted.
Analog
Hibernation Module oscillator crystal input or
an external clock reference input. Note that
this is either a 4.19-MHz crystal or a
32.768-kHz oscillator for the Hibernation
Module RTC. See the CLKSEL bit in the
HIBCTL register.
Analog Hibernation Module oscillator crystal output.
TTL
XTALN of the Ethernet PHY
TTL
XTALP of the Ethernet PHY
Table 18-3. Signals by Function, Except for GPIO
Function
Controller Area
Network
Pin Name
CAN0Rx
CAN0Tx
Pin
Number
10
11
Pin Type
I
O
Buffer
Type
TTL
TTL
Description
CAN module 0 receive
CAN module 0 transmit
460
September 02, 2007
Preliminary