LM3S8730 Datasheet, PDF (16/502 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
I²C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 354
I²C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 355
I²C Master Configuration (I2CMCR), offset 0x020 ............................................................ 356
I²C Slave Own Address (I2CSOAR), offset 0x000 ............................................................ 358
I²C Slave Control/Status (I2CSCSR), offset 0x004 ........................................................... 359
I²C Slave Data (I2CSDR), offset 0x008 ........................................................................... 361
I²C Slave Interrupt Mask (I2CSIMR), offset 0x00C ........................................................... 362
I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x010 ................................................... 363
I²C Slave Masked Interrupt Status (I2CSMIS), offset 0x014 .............................................. 364
I²C Slave Interrupt Clear (I2CSICR), offset 0x018 ............................................................ 365
Controller Area Network (CAN) Module ..................................................................................... 366
Register 1: CAN Control (CANCTL), offset 0x000 ............................................................................. 380
Register 2: CAN Status (CANSTS), offset 0x004 ............................................................................... 382
Register 3: CAN Error Counter (CANERR), offset 0x008 ................................................................... 385
Register 4: CAN Bit Timing (CANBIT), offset 0x00C .......................................................................... 386
Register 5: CAN Interrupt (CANINT), offset 0x010 ............................................................................. 388
Register 6: CAN Test (CANTST), offset 0x014 .................................................................................. 389
Register 7: CAN Baud Rate Prescalar Extension (CANBRPE), offset 0x018 ....................................... 391
Register 8: CAN IF1 Command Request (CANIF1CRQ), offset 0x020 ................................................ 392
Register 9: CAN IF2 Command Request (CANIF2CRQ), offset 0x080 ................................................ 392
Register 10: CAN IF1 Command Mask (CANIF1CMSK), offset 0x024 .................................................. 393
Register 11: CAN IF2 Command Mask (CANIF2CMSK), offset 0x084 .................................................. 393
Register 12: CAN IF1 Mask 1 (CANIF1MSK1), offset 0x028 ................................................................ 396
Register 13: CAN IF2 Mask 1 (CANIF2MSK1), offset 0x088 ................................................................ 396
Register 14: CAN IF1 Mask 2 (CANIF1MSK2), offset 0x02C ................................................................ 397
Register 15: CAN IF2 Mask 2 (CANIF2MSK2), offset 0x08C ................................................................ 397
Register 16: CAN IF1 Arbitration 1 (CANIF1ARB1), offset 0x030 ......................................................... 398
Register 17: CAN IF2 Arbitration 1 (CANIF2ARB1), offset 0x090 ......................................................... 398
Register 18: CAN IF1 Arbitration 2 (CANIF1ARB2), offset 0x034 ......................................................... 399
Register 19: CAN IF2 Arbitration 2 (CANIF2ARB2), offset 0x094 ......................................................... 399
Register 20: CAN IF1 Message Control (CANIF1MCTL), offset 0x038 .................................................. 400
Register 21: CAN IF2 Message Control (CANIF2MCTL), offset 0x098 .................................................. 400
Register 22: CAN IF1 Data A1 (CANIF1DA1), offset 0x03C ................................................................. 402
Register 23: CAN IF1 Data A2 (CANIF1DA2), offset 0x040 ................................................................. 402
Register 24: CAN IF1 Data B1 (CANIF1DB1), offset 0x044 ................................................................. 402
Register 25: CAN IF1 Data B2 (CANIF1DB2), offset 0x048 ................................................................. 402
Register 26: CAN IF2 Data A1 (CANIF2DA1), offset 0x09C ................................................................. 402
Register 27: CAN IF2 Data A2 (CANIF2DA2), offset 0x0A0 ................................................................. 402
Register 28: CAN IF2 Data B1 (CANIF2DB1), offset 0x0A4 ................................................................. 402
Register 29: CAN IF2 Data B2 (CANIF2DB2), offset 0x0A8 ................................................................. 402
Register 30: CAN Transmission Request 1 (CANTXRQ1), offset 0x100 ................................................ 403
Register 31: CAN Transmission Request 2 (CANTXRQ2), offset 0x104 ................................................ 403
Register 32: CAN New Data 1 (CANNWDA1), offset 0x120 ................................................................. 404
Register 33: CAN New Data 2 (CANNWDA2), offset 0x124 ................................................................. 404
Register 34: CAN Message 1 Interrupt Pending (CANMSG1INT), offset 0x140 ..................................... 405
Register 35: CAN Message 2 Interrupt Pending (CANMSG2INT), offset 0x144 ..................................... 405
Register 36: CAN Message 1 Valid (CANMSG1VAL), offset 0x160 ....................................................... 406
Register 37: CAN Message 2 Valid (CANMSG2VAL), offset 0x164 ....................................................... 406
16
September 02, 2007
Preliminary