LM3S601 Datasheet, PDF (130/446 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Input/Outputs (GPIOs)
8.1
Block Diagram
Figure 8-1. GPIO Module Block Diagram
PA0
U0Rx
UART0
PA1
U0Tx
PA2
SSIClk
PA3
SSIFss
SSI
PA4
SSIRx
PA5
SSITx
PB0
PWM2
PWM1
PB1
PWM3
PB2
I2CSCL
I²C
PB3
I2CSDA
PB4
C0-
C2-
PB5
C1-
Analog
C2+
Comparators
PB6
C0+
C0o/C1+
PB7
JTAG
GPIO Port C
PWM2
PWM4
PWM5
PE0
PE1
CCP5 Timer2 CCP4
PE2
PE3
CCP2 Timer1 CCP3
PE4
PE5
Fault
PWM0
PWM0
PWM1
PD0
PD1
UART1
U1Rx
U1Tx
PD2
PD3
CCP1 Timer0 CCP0
PD4
PD5
PD6
PhB
PhA
QEI
IDX
PD7
8.2 Functional Description
Important: All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the exception
of the five JTAG pins (PB7 and PC[3:0]). The JTAG pins default to their JTAG
functionality (GPIOAFSEL=1). A Power-On-Reset (POR) or asserting an external reset
(RST) puts both groups of pins back to their default state.
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure
8-2 on page 131). The LM3S601 microcontroller contains five ports and thus five of these physical
GPIO blocks.
130
October 01, 2007
Preliminary