LM3S601 Datasheet, PDF (13/446 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S601 Microcontroller
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GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 140
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 141
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 142
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 143
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 144
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 145
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 146
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 148
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 149
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 150
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 151
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 152
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 153
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 154
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 155
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 156
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 157
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 158
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 159
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 160
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 161
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 162
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 163
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 164
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 165
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 166
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 167
General-Purpose Timers ............................................................................................................. 168
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 180
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 181
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 183
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 185
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 188
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 190
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 191
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 192
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 194
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 195
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 196
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 197
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 198
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 199
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 200
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 201
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 202
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 203
Watchdog Timer ........................................................................................................................... 204
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 207
October 01, 2007
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Preliminary