M12L2561616A_1 Datasheet, PDF (4/45 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks Synchronous DRAM

ESMT
M12L2561616A
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted，T_A = 0 to 70 °C
Parameter
Symbol
Test Condition
CAS
Latency
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
I_CC1
I_CC2P
I_CC2PS
Burst Length = 2, t_RC = t_RC(min), I_OL = 0 mA
CKE = V_IL(max), tcc = 10ns
CKE & CLK=V_IL (max), t_CC = ∞
Precharge Standby Current
in non power-down mode
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
I_CC2N
I_CC2NS
I_CC3P
I_CC3PS
I_CC3N
I_CC3NS
I_CC4
I_CC5
I_CC6
CKE=V_IH(min), CS = V_IH(min), t_CC = 10ns
Input signals are changed one time during 2t_ck
CKE=V_IH(min), CLK=V_IL(max), tcc = ∞
input signals are stable
CKE=V_IL(max), t_CC =10ns
CKE & CLK=V_IL(max), t_CC = ∞
CKE ≥ V_IH(min), CS ≥ V_IH(min), t_CC = 15ns
Input signals are changed one time during 2clks
All other pins ≥ V_DD-0.2V or ≤ 0.2V
CKE=V_IH(min), CLK=V_IL(max), t_CC = ∞
input signals are stable
I_OL = 0 mA, Page Burst, 4 Banks activated,
t_CCD = 2 CLKs
t_RFC ≥ t_RFC(min)
CKE=0.2V
Note : 1. Measured with outputs open.
2. Input signals are changed one time during 2 CLKS.
Version
-6
-7
170
150
4
4
50
30
20
20
55
Unit Note
mA 1,2
mA
mA
mA
mA
45
210
180
210
180
5
mA
mA 1,2
mA
mA
Elite Semiconductor Memory Technology Inc.
Publication Date: Jun. 2008
Revision: 1.4
4/45