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M14D1G1664A-2D Datasheet, PDF (23/64 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle
ESMT
M14D1G1664A (2D)
Slew Rate Definition Tangent
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2013
Revision : 1.3
23/64