M14D1G1664A-2D Datasheet, PDF (10/64 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
M14D1G1664A (2D)
AC Overshoot / Undershoot Specification
Parameter
Pin
Maximum peak amplitude allowed for
overshoot
Maximum peak amplitude allowed for
undershoot
Maximum overshoot area above V_DD
Maximum undershoot area below V_SS
Address, CKE, CS , RAS , CAS , WE ,
ODT, CLK, CLK , DQ, DQS, DQS , DM
Address, CKE, CS , RAS , CAS , WE ,
ODT, CLK, CLK , DQ, DQS, DQS , DM
Address, CKE, CS , RAS , CAS , WE ,
ODT,
CLK, CLK , DQ, DQS, DQS , DM
Address, CKE, CS , RAS , CAS , WE ,
ODT,
CLK, CLK , DQ, DQS, DQS , DM
Value
-1.8
-2.5
0.5
0.5
0.66
0.23
0.66
0.23
Unit
-3
V
V
0.8
V-ns
V-ns
0.8
V-ns
V-ns
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2013
Revision : 1.3
10/64