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E981.03 Datasheet, PDF (7/51 Pages) ELMOS Semiconductor AG – Autonomous MAC and individual physical address
KNX/ EIB TRANSCEIVER
PRODUCTION DATA - JAN 15, 2015
E981.03
Electrical Characteristics (continued)
(VBUSP = 19V … 33V, TAMB = -25°C … +85°C, unless otherwise noted. Positive currents are flowing into the device pins.
Typical values are at TAMB = +25°C, unless otherwise noted.)
Description
Condition
Relative V20 supply deactivation
threshold
High threshold at pin WK. 1)
Low threshold at pin WK. 1)
Pull down current at pin
WK (active in input mode) 1)
High level at pin WK
VWK = VVIO/2,
VVIO = 5V
IWK = -2mA
High level at pin WK
IWK = -0.5mA
Low level at pin WK
IWK = 5mA
E981.03 mode parameters - AC Characteristics
Maximum duration of hard reset VBUSP > 20 V
mode
C33I = 100 nF
Wait time between KNX bus com-
munication free and sending Reset
indication to the host processor
Duration of an active driven wake-
up pulse to MCU causes by a valid
trigger telegram
Debounce time of alarm condition
at pin SETVCC
Reset Concept - DC Characteristics
Actively driven low level on pin
RESET
Pull up current at pin RESET 2)
Low level at pin RESET input path
IVREVSIEOT><35VmA
VVRVEIOSE=T =50VV
High level at pin RESET input path
Minimum voltage at pin VIO for in-
terpreting the input path of
RESET 3)
Reset Concept - AC Characteristics
Debounce time of input pin RESET
for activation soft reset mode
Minimum active time of RESET 4)
Power Supply – DC Characteristics
Voltage drop between BSUP and
VST PIN
Maximum DC BUSP current
MAX_BUS_CURR
(0x20F) = 0xBF
Symbol
VV20,off,rel
VWK,high
VWK,low
IWK,pd
VWK,OUT,high2
VWK,OUT,high5
VWK,OUT,low
Min
2.0
1.1
Typ
VBUSP,mean
-6V
60
VVIO -1V
VVIO
-0.5V
Max
2.5
1.6
0.7
Unit
V
V
µA
V
V
V
t33I,on
tw,ri
40
tTRIGGER,pw
80
tALARM,deb
100
100
20
ms
bit
times
120
ms
120
ms
VRESET,low, out
0.4
V
IRESET,pu
-500
µA
VRESET, low,in
VRESET, high,in
0.8
0.2
VIO
VIO
VIO,min, RESET
2.0
V
tRESET,deb
tRESET,min
VST_drop
IBUSP(max)
10
10
2
2.4
11.4 12
µs
20
ms
3
V
12.6 mA
1) The WK pin is configurable as input or as output which sent a trigger pulse on received trigger telegram. To configure this
change bit EN_OUT to “0” in Register TRIGGER (0x214). Default configuration is output.
2) The RESET pin is an open drain input/output with pull current source to VIO
3) The input at pin RESET is not active in reset and startup modes and in case of low VIO
4) In case of RESET activation by E981.03.
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0046E.03
7/51