E981.03 Datasheet, PDF (3/51 Pages) ELMOS Semiconductor AG – Autonomous MAC and individual physical address

KNX/ EIB TRANSCEIVER
PRODUCTION DATA - JAN 15, 2015
E981.03
Pin Description
Pin Name
1 OTEMP
2 RESET
3 i.c.
4 AOUT
5 SETVCC
6 V33I
7 WK
8 CREC
9 BUSN
10 RTXL
11 RTXH
12 BUSP
13 i.c.
14 V20
15 VST
16 i.c.
17 SW
18 VCC
19 VIO
20 BS0
21 BS1
22 INT
23 EXTAL
24 XTAL
25 TXD
26 RXD
27 GND
28 SCS
29 SCK
30 MISO
31 MOSI
32 SAVE
33 EP
Type ¹⁾ Pull
D_O
-
D_IO
Up
-
-
A_O
-
D_I
2)
S
-
HV_D_IO -
HV_A_I -
S
-
HV_A_IO -
HV_A_IO -
HV_S -
-
-
HV_S -
HV_S -
-
-
HV_A_IO -
A_I
-
S
-
D_I
D_I
D_O
D_O
D_I
D_O
D_I
S
D_I
D_I
D_IO
D_IO
D_O
Down
Down
-
-
-
-
Down
-
Up
Down
-
-
Up
Description
Over-temperature warning
Bidirectional reset pin (low active)
Reserved for factory use, connect to GND during operation.
Analog multiplexer output
Combination of
- selection of the VCC output voltage and
- alarm function activation
3.3V internal supply: Connect to external capacitor
Output with tri-state capability; used for KNX telegram trigger
Output [default]: VIO related output levels
Input: VST tolerant. Thresholds V_V33i related
Receive pin for KNX bus communication
Connection to the negative bus line
Ground connection of external resistor RTX
KNX send output pin - upper connection of external resistor RTX
Connection to positive KNX bus via external diode for reverse polar-
ity protection
Reserved for factory use, connect to GND during operation.
20V DC supply output
Connection to external storage capacitor CST
Do not connect externally
Switched output of DC/ DC converter
DC/ DC converter output voltage control input
Supply for digital IO pins (connect to VCC if no external supply is
used)
Baud rate select pin 0
Baud rate select pin 1
Used for KNX collision trigger (low active)
External crystal terminal 2
External crystal terminal 1 or clock input if no crystal is connected
UART transmit signal: from E981.03 to host processor (push/pull)
UART receive signal: from host processor to E981.03
GND pin
SPI chip select (low active) or General Purpose Input if SPI is disabled
SPI clock or GPI if SPI is disabled
SPI master in slave out data line or GPIO if SPI is disabled
SPI master out slave in data line or GPIO if SPI is disabled
VST under voltage pre alarm signal (low active)
Exposed Die Pad
1) D = digital, A = analog, S = supply, I = input, O = output, HV = high voltage
2) Internally weak pulled to V33I/2. A open pin is the alarm condition. To select a VCC voltage push it to VIO or pull it to GND.
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0046E.03
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