E981.03 Datasheet, PDF (46/51 Pages) ELMOS Semiconductor AG – Autonomous MAC and individual physical address

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PRODUCTION DATA - JAN 15, 2015
E981.03
Register SPI_PINS is used for SPI pin value accesses. Bits SCS and SCK reflect the state of IC pins in any case of op-
eration mode.
When SPI is switched off (bits ON1 and ON0 of register SPI_CTRL are both „0“) MOSI and MISO are used as gen-
eral purpose input / output of the E981.03 that can be controlled by host processor. Pins SCS and SCK can be
used as general purpose input pin.
Table 60. SPI pin access
back to Table 8 Register Table
SPI_PINS
MSB
LSB
content
-
-
MOSIEN MISOEN MISO MOSI SCSN SCK
hard reset value
soft reset value
register bits reflect always the state of the physical pins
defining reset values makes no sense
SPI switched on 0
0
0
1
pin values
SPI switched off
access
R
R
R/W ¹⁾
R/W ¹⁾
R/W ¹⁾
R/W ¹⁾
R ¹⁾
R ¹⁾
bit description
MOSIEN : this bit set the pin direction 0 means high ohmic input 1 mean output.
MISOEN : this bit set the pin direction 0 means high ohmic input 1 mean output.
(enable for tri-state output)
MISO : if the pin is used as a input this bit reflects the input state and
if the pin is used as a output the user write the output level.
MOSI : if the pin is used as a input this bit reflects the input state and
if the pin is used as a output the user write the output level.
SCSN : this bit reflects the input state of the SCS pin
SCK : this bit reflects the input state of the SCK pin
1) Access via UART service and SPI possible.
Table 61. RESET_CTRL
Register Name
RESET_CTRL
Address
0x201
Description
RESET_CTRL control register
Table 62. RESET_CTRL control register
back to Table 8 Register Table
RESET_CTRL
MSB
LSB
content
-
-
-
-
-
-
-
RST
hard reset value 0
0
0
0
0
0
0
0
soft reset value -
-
-
-
-
-
-
0
access
R
R
R
R
R
R
R
R/W ¹⁾
bit description
RST :
Writing a “1” to bit RST results in a transition to soft reset state. Writing to the RESET_CTRL
register is the way to initiate a soft reset via either host SPI or host UART interfaces.
1) Access via UART service and SPI possible. In case of hard or soft reset the register is reset to the hard reset value or soft reset
value respectively.
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0046E.03
46/51