E981.03 Datasheet, PDF (19/51 Pages) ELMOS Semiconductor AG – Autonomous MAC and individual physical address

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PRODUCTION DATA - JAN 15, 2015
E981.03
6.1 Reset / Power Up-&Down Sequence
6.2 Overall
To ensure a stable function under all conditions the E981.03 supports several power up and power down scenarios.
The status of the configurable supply management/ monitoring can be queried via UART and digital SAVE pin at any
time.
Properties
Power Up Sequence
• Hard Reset Mode
• Start Up Mode

• Soft Reset
V33I not ok
external supply voltage switch on dependent on capacitance the Power Up
Sequence stays longer in this mode
E981.03 will be set to soft reset value.
Power Down Sequence
• Save Mode
• Internal Reset
SAVE pin is active (low)
Hard Reset Mode
6.3 Undervoltage Condition
With falling bus voltage (data point 1) VST falls, too.
When V_VST is below either V_V20,off,abs or V_V20,off,rel (whichev-
er is higher) V20 is switched off (data point 2). V_VST will
rise in typical case of high V20 load resulting in pulsed
activation of V20.
When V_VST falls below V_VST,save,HL the SAVE signal is ac-
tivated to initiate the save routines of host processor
(data point 3). The DC/DC converter continues its nor-
mal operation until V_VST falls below the minimum con-
verter input voltage V_VCC switch off and the V_V33I input
(or output compare Figure 6 Configurable Power Man-
agement) make a switchover to V_VST without a fail time
(data point 4). To avoid bus overload soft start phase
with bus current reduction is activated in case of ac-
tive SAVE.
The RESET signal is activated when V_VCC falls below the
threshold V_RESET,HL (short after data point 4). If the BUSP
recovers now (data point 5) the IC come back with-
out internal reset. SAVE will be deactivated, when V_VST
achieves the value V_VST,save,LH (data point 6). V_VCC will be
activated, when V_VST achieves the value V_VST,VCCon (data
point 7). The IC is back on regular condition after V_VST
achieves V_BUSP - V_{VST_drop} (data point 8). With the return-
ing V_VCC the V_33I output (compare Figure 6 Configurable
Power Management) make a switchover to V_VCC if V_VCC
is in a valid range for 3.3V otherwise the Input of the
internal V_33I regulator switch to V_VST and the output of
V_33I regulator switch to V_V33I output. And finally V20 re-
covers.
The 2^nd case with data point 10 to 14 is like the case be-
fore, but now the V_VST drop deeper and finally E981.03
will be reset when V_33I is lower than V_33I, reset, act (data
point 14).
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0046E.03
19/51