BCM4319XKUBGT Datasheet, PDF (76/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/ Radio with Integrated SDIO and USB Interfaces

BCM4319 Preliminary Data Sheet
SDIO Default Mode Timing
Table 27: gSPI Timing
Parameter
Symbol Minimum Maximum Units Note
Clock to CSX^{a –}
–
–
ns Last falling edge to CSX high
a. SPI_CSx remains active for entire duration of SPI read/write/write_read transaction (i.e., overall words for
multiple word transaction).
SDIO Default Mode Timing
SDIO default mode timing is shown by the combination of Figure 23 and Table 28 on page 75.
Figure 23: SDIO Bus Timing (Default Mode)
f_PP
t_WL
t_WH
SDIO_CLK
Input
t_THL
t_TLH
t_ISU
t_IH
Output
t_ODLY
(max)
t_ODLY
(min)
Table 28: SDIO Bus Timing ^a Parameters (Default Mode)
Parameter
Symbol Minimum Typical
SDIO CLK (All values are referred to minimum VIH and maximum VIL^b)
Frequency – Data Transfer mode
Frequency – Identification mode
Clock low time
Clock high time
Clock rise time
Clock low time
fPP
0
–
fOD
0
–
tWL
10
–
tWH
10
–
tTLH
–
–
tTHL
–
–
Maximum Unit
25
MHz
400
kHz
–
ns
–
ns
10
ns
10
ns
Broadcom^®
April 2, 2014 • 4319-DS05-R
Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/Radio
Page 75