BCM4319XKUBGT Datasheet, PDF (17/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/ Radio with Integrated SDIO and USB Interfaces

BCM4319 Preliminary Data Sheet
Power Supplies and Management
Section 2: Power Supplies and
Management
Power Management
The BCM4319 has been designed with the stringent power consumption requirements of mobile devices in
mind. All areas of the chip design are optimized to minimize power consumption. Silicon processes and cell
libraries were chosen to reduce leakage current and supply voltages. Additionally, the BCM4319 integrated
RAM is a high Vt memory with dynamic clock control. Leakage current is the dominant supply current consumed
by the RAM.
The BCM4319 includes an advanced wireless local area network (WLAN) PMU. The PMU provides significant
power savings by putting the BCM4319 into various power management states appropriate to the current
environment and activities that are being performed. The power management unit enables and disables internal
regulators, switches, and other blocks based on a computation of the required resources and the relationship
between resources and the time needed to enable and disable them. Power-up sequences are fully
programmable. Configurable, free-running counters (running on an internal LPO clock) in the PMU are used to
turn individual regulators and power switches on and off. Clock speeds are dynamically changed or gated for
the current mode. Slower clock speeds are used wherever possible.
The BCM4319 power states are described as follows:
• Active mode—All BCM4319 cores are powered up and fully functional with active carrier sensing, frame
transmission, and frame reception. All required regulators are enabled and put in the most efficient mode,
either Pulse Width Modulation (PWM) or Burst, based on the load current. Clock speeds are dynamically
adjusted by the PMU.
• Sleep mode—The radio, analog front end (AFE), Phase-Locked Loops (PLLs), and read-only memories
(ROMs) are powered down. The rest of the BCM4319 remains powered up in an IDLE state. All main
clocks are shut down. The internal 32 kHz clock is used by the PMU to wake the chip and transition to
Active mode. In Sleep mode, the primary power consumed is due to leakage current. The internal
baseband switcher is put into burst mode for better efficiency at low load currents.
• Power-down mode—The BCM4319 is effectively powered off by shutting down all internal regulators. The
chip is brought out of this mode by external logic re-enabling the internal regulators.
Voltage Regulators
One Buck regulator, five LDO regulators, and a PMU are integrated into the BCM4319. All regulators are
programmable via the PMU.
• Core Buck: 2.7–5.5V in; 1.4V, 300 mA out
• Low-noise LNLDO1: 1.4V in; 1.2V, 150 mA out
• Low-noise LNLDO2 (optional): 1.4V or 3.3V in; 1.2V or 2.5V, 50 mA out
• Low-noise CLDO: 1.4V in; 1.2V, 200 mA out
Broadcom^®
April 2, 2014 • 4319-DS05-R
Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/Radio
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