BCM4319XKUBGT Datasheet, PDF (33/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/ Radio with Integrated SDIO and USB Interfaces

BCM4319 Preliminary Data Sheet
Figure 13: SPI Signal Timing with Status (Response Delay = 0)
Write
cs
sclk
mosi
miso
Write-Read
cs
sclk
mosi
miso
Read
cs
sclk
mosi
miso
CC3311
CC11 CC00 DD3311
DD11 DD00
SS3311
SS11 SS00
Command 32 bits
Write Data 16*n bits
Status 32 bits
CC3311
CC00
Command 32 bits
DD3311
DD11 DD00 SS3311
SS00
Read Data 16*n bits
Status 32 bits
CC3311
CC00
Command 32 bits
DD3311
DD11 DD00 SS3311
SS00
Read Data 16*n bits
Status 32 bits
gSPI
Bit
0
1
2
3
4
5
6
7
8
9:19
20
21:31
Table 2: SPI Status Field Details
Name
Data not available
Underflow
Overflow
F2 interrupt
F3 interrupt
F2 RX Ready
F3 RX Ready
Reserved
F2 Packet Available
F2 Packet Length
F3 Packet Available
F3 Packet Length
Description
The requested read data is not available
FIFO underflow occurred due to current (F2, F3) read
command
FIFO overflow occurred due to current (F1, F2, F3) write
command
F2 channel interrupt
F3 channel interrupt
F2 FIFO is ready to receive data (FIFO empty)
F3 FIFO is ready to receive data (FIFO empty)
–
Packet is available/ready in F2 TX FIFO
Length of packet available in F2 FIFO
Packet is available/ready in F3 TX FIFO
Length of packet available in F3 FIFO
Broadcom^®
April 2, 2014 • 4319-DS05-R
Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/Radio
Page 32