BCM4319XKUBGT Datasheet, PDF (56/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/ Radio with Integrated SDIO and USB Interfaces

BCM4319 Preliminary Data Sheet
Strapping Options and GPIO Functions
Figure 18: Signal Connections to SDIO Card (SD 4-Bit Mode)
VDDIO_SD
47k
(see note)
47k x4
(see note)
SD Host
CLK
CMD
DAT(3:0)
BCM4319
Note: Section 6 of the SDIO physical layer specification specifies that the SDIO host must
provide a 10k - 100k ohm pull-up resistor on each CMD and DAT(3:0) signal line. This
requirement must be met to properly operate the BCM4319.
Figure 19: Signal Connections to SDIO Card (gSPI Mode)
SD Host
SCLK
DI
DO
IRQ
CS
BCM4319
Strapping Options and GPIO Functions
The pins listed in Table 8 on page 56 are sampled at power-on reset (POR) after WL_REG_ON goes high, to
determine the various operating modes. Sampling occurs within 150 milliseconds after WL_REG_ON goes high.
After POR each pin assumes the GPIO or alternative function specified in the signal descriptions table. Each
pin has an programmable internal pull-up or pull-down resistor that determines the default mode. To change the
mode, connect an external pull-up resistor to VDDIO or a pull-down resistor to GND—use a 10 KΩ resistor or
less (refer to the reference board schematics for more information).
All GPIOs can be safely used in output mode. GPIOs that do not have interfering strapping options can be safely
used as input pins, specifically including:
• USB mode: 1, 2, and 3
• SDIO mode: 1, 2, 3, and 9
• gSPI mode: 2 and 9
Broadcom^®
April 2, 2014 • 4319-DS05-R
Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/Radio
Page 55