BCM4319XKUBGT Datasheet, PDF (75/84 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/ Radio with Integrated SDIO and USB Interfaces

BCM4319 Preliminary Data Sheet
Interface Timing Specifications
Section 14: Interface Timing
Specifications
This section describes the interface timing for gSPI, SDIO (default), and SDIO high-speed modes.
gSPI TIMING
The gSPI host and device always use the rising edge of the clock to sample data.
Figure 22: gSPI Timing
Table 27: gSPI Timing
Parameter
Clock period
Clock high/low
Symbol
T1
T2/T3
Clock rise/fall time T4/T5
Input setup time T6
Input hold time T7
Output setup time T8
Output hold time T9
CSX to clock^{a –}
Minimum
20.8
(0.45 × T1) –
T4
–
5.0
5.0
5.0
5.0
7.86
Maximum
–
(0.55 × T1) –
T4
2.5
–
–
–
–
–
Units Note
ns F_max = 48 MHz
ns –
ns –
ns Setup time, SIMO valid to SPI_CLK active
edge
ns Hold time, SPI_CLK active edge to SIMO
invalid
ns Setup time, SOMI valid before SPI_CLK
rising
ns Hold time, SPI_CLK active edge to SOMI
invalid
ns CSX fall to 1st rising edge
Broadcom^®
April 2, 2014 • 4319-DS05-R
Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/Radio
Page 74