STC5455 Datasheet, PDF (45/56 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

the index selected at the register Ref_Index_Selector.
STC5455
Synchronous Clock for SETS
Data sheet
Setting integer N (from 1 to 32767) at this register allows user to manually select the acceptable reference
input frequency at the integer multiple of 8kHz, range from 8kHz to 262.136MHz. For instance, user can select
integer N = 19440 to manually accept frequency at 19440x8kHz = 155.52MHz.
Default value: 0
Field Value
0
1~32767
Integer N Select
Enable auto detection for reference input
Integer N for the manual acceptable refer-
ence frequency
Frame_Mux, 0x5D (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x5D
Not used
Frame mux of
CLK2 selection
Select one of frame signals (Frame8K, Frame2K) derived from synthesizer F and forward it to output selection
of CLK2. Output selection of CLK2 is programmed at the registers CLK2_Sel.
Bit1~Bit0
0
1
2
3
Default value: 1
Field_Upgrade_Status, 0x70 (R)
Frame signal select
Reserved
Frame8K
Frame2K
Ground
Address
Bit7
0x70
Bit6
Bit5
Bit4
Not used
Bit3
Bit2
Load_Complete
Bit1
READY
Bit0
Checksum
Checksum
Checks whether the 7600 bytes firmware configuration data is loaded successfully.
0 = Fail, 1 = Success
READY
Indicates if field upgrade is ready to begin, normally is set to 1 at 3 milliseconds (3ms) after the reset.
0 = Not ready
1 = Ready
Load_Complete
Indicates whether the loading of 7600 bytes firmware configuration data is complete.
0 = Not complete
1 = Complete
Preliminary
Page 45 of 56 TM121
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011