STC5455 Datasheet, PDF (44/56 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

Register
Frame_Mux
(Bit1~Bit0)
X
0
1
2
3
X
Default value: 0
Frame8K_Sel, 0x59 (R/W)
Frame2K_Sel, 0x5A (R/W)
Bits 1 ~ 0
1
2
2
2
2
3
STC5455
Synchronous Clock for SETS
Data sheet
CLK2 Synthesizer Select
Synthesizer G₂ (T0)
Reserved
Synthesizer F Frame8K
Synthesizer F Frame2K
CLK2 tie to ground
Synthesizer G_T4 (T4)
Address
0x59
0x5A
Bit7
Not used
Not used
Bit6
Invert
Invert
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Duty Cycle Select for Frame8K or put CLK8K into tri-state
Duty Cycle Select for Frame2K or put CLK2K into tri-state
Selects duty cycle of the Frame8K and Frame2K generated from synthesizer F and determine frame edge is
rising or falling. Set Bit5~0 to 0 to put CLK8K/CLK2K into tri-state and put Frame8K/Frame2K of synthesizer F
to ground.
Bit 5 ~ 0
0
1~62
63
Duty Cycle Select
Put CLK8K/CLK2K into tri-state and put Frame8K/Frame2K to ground
Pulse width 1 to 62 cycle of 155.52MHz
50% duty cycle
Bits 6
0
1
Default value: 0 (Tri-state/ground, not inverted)
Invert
Not inverted (frame on rising edge)
Inverted (frame on falling edge)
Ref_Acceptable_Freq, 0x5B (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x5B
Lower 8 bits of integer N Select
0x5C
Not used
Higher 7 bits of integer N Select
Enable frequency auto detect function or set integer N for the manual acceptable reference frequency for indi-
vidual reference input.
Setting this register to 0 is to enable frequency auto detection for reference input which is selected at the regis-
ter Ref_Index_Selector. The auto-detect acceptable reference input frequencies are shown in Table 3.
Select the integer N for the manually acceptable reference frequency at Nx8kHz (N is integer from 1 to 32767)
for REF1 ~ REF5. Which of reference inputs is selected for the manually acceptable reference is depending on
Preliminary
Page 44 of 56 TM121
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011