STC5455 Datasheet, PDF (39/56 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

PLL_Status, 0x3C (R)
STC5455
Synchronous Clock for SETS
Data sheet
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3C
HHA
DHT
FEE
SAP
OOP
LOL
LOS
SYNC
SYNC Indicates whether synchronization has been achieved
0 = Not synchronized
1 = Synchronized
LOS
Loss of signal of the selected reference
0 = No Loss
1 = Loss (Indicate loss of signal, freerun, pseudo holdover and holdover)
LOL
Loss of lock (Failure to achieve or maintain lock)
0 = No loss of lock
1 = Loss of lock (Indicate loss of lock, freerun, pseudo holdover and holdover)
OOP
Out of pull-in range. Indicate the frequency offset of the selected reference input is out of pull-in range.
1 = Out of pull-in range
0 = In range
SAP
Indicates whether the output clocks have stopped following the selected reference, caused by out of
pull-in range
1 = Stop following at pull-in range boundary
0 = Following
FEE Frame edge error. Indicates whether an error occurs when select frame edge in frame phase align
mode. Frame edge on the reference input is selected at the register Frame_Phase_Align
1 = Frame edge error occurs
0 = No frame edge error occurs
DHT
Device Holdover History tracking
1 = Device holdover history is being tracked.
0 = Device holdover history is acquired based on the last available history.
HHA
Holdover History Availability. Configure Control_Mode register to select which of holdover history is
used. Device Holdover History or User Specified History.
1 = Available
0 = Not available
Holdover_Accu_Flush, 0x3D (W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x3D
Not used
HO flush
Writing to this register will perform a flush to the accumulated history. Bit HO flush determines which of histo-
ries is flushed.
HO flush:
0 = Flush and clear long term history to 0
Preliminary
Page 39 of 56 TM121
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011