STC5455 Datasheet, PDF (38/56 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

Bits 7 ~ 4
5
6, 7
8
9
10
11
12
13
14
15
STC5455
Synchronous Clock for SETS
Data sheet
Long Term
History -3dB
Bandwidth
0.15 mHz
Reserved
1.3Hz
0.64Hz
0.32Hz
0.16Hz
79mHz
40mHz
20mHz
9.9mHz
Bits 3 ~ 2
0
1
2
3
Short Term
History -3dB
Bandwidth
1.3 Hz
0.64 Hz
0.32 Hz
0.16 Hz
Bits 1 ~ 0
0
1
2
3
Default value: 27 (1.2mHz; 0.64Hz; 2ppm/sec)
Ref_Priority_Table, 0x36 (R/W)
Ramp control
No Control
1.0 ppm/sec
1.5 ppm/sec
2.0 ppm/sec
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x36
0x37
0x38
Ref 2 Priority
Ref 4 Priority
Not used
Ref 1 Priority
Ref 3 Priority
Ref 5 Priority
Reference priority for automatic reference elector. Lower values have higher priority:
Default value: 0
Bits 7~4/Bits 3~0
0
1 ~ 15
Reference Priority
Revoke from auto reference elector
Value 1 ~ 15
Preliminary
Page 38 of 56 TM121
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011