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STC5455 Datasheet, PDF (14/56 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS
STC5455
Synchronous Clock for SETS
Data sheet
General Description
Application
The STC5455 is a single chip solution for the syn-
chronous clock in SDH (SETS), SONET, and Syn-
chronous Ethernet network elements. The device is
fully compliant with ITU-T G.813 (option1 and
option2), G.8262 EEC (option1 and option2) Telcordia
GR1244, and GR253 (Stratum3/4E/4/SMC). Its highly
integrated design implements all necessary reference
selection, monitoring, filtering, synthesis, and control
functions. An external oscillator (e.g., high precision
OCXO or TCXO) completes a system level solution
(see Functional Block Diagram, Figure 1). The
STC5455 has four options for frequency of external
oscillator. The STC5455 supports multiple-master
operations for redundant application.
Overview
The STC5455 accepts 5 reference inputs and gener-
ates 4 synchronized clock outputs, including 2 frame
pulse clock outputs at 8kHz and 2kHz. Two indepen-
dent PLL-based timing generators, T0 and T4, pro-
vide the essential functions for Synchronous
Equipment Timing Sources (SETS). T0 controls syn-
thesizers G1, G2, and synthesizer F. T4 controls syn-
thesizer GT4. Clock outputs CLK1 and CLK2 can be
derived from synthesizer G1 and G2, respectively.
CLK2 can also be derived from synthesizer F through
T0 path or synthesizer GT4 through T4 path. Frame
pulse clock outputs are derived from synthesizer F.
The STC5455 incorporates a SPI interface, providing
access to status registers.
Chip Master Clock
The STC5455 operates with an external oscillator
(e.g., OCXO or TCXO) as its master clock. The
device supports four different frequencies of master
clock with programming: 10MHz, 12.8MHz, 19.2MHz,
and 20MHz. Initial default accepted frequency is
12.8MHz.
Reference Inputs and External
Sync Inputs
REF1~REF3 and 2 LVPECL/LVDS REF4~REF5. The
5 reference inputs arFeucnocnttiinounouasllySapceticviitfyicaandtioqunal-
ity monitored. The reference inputs may be selected
to accept either the auto-detect acceptable reference
frequency which can be automatically detected by
STC5455 or manually acceptable reference fre-
quency. The activity monitoring is implemented with a
programmable leaky bucket algorithm. A reference is
designated as “qualified” if it is active and its fractional
frequency offset is within the programmed range for a
programmed soaking time. An auto reference elector
elects the most appropriate one from the reference
inputs according to the revertivity status, and each
reference’s priority and qualification. Revertivity
determines whether a higher priority qualified refer-
ence should preempt a qualified current selected ref-
erence. If none of the references input is qualified,
holdover or freerun mode will be elected depending
on the availability of the holdover history.
Reference selection may be automatic, manual, or
hard-wired manual. In automatic reference selection
mode, the most appropriate one elected from the auto
reference elector will be the selected reference input.
In manual reference selection mode, user may spec-
ify any of the reference inputs as the selected refer-
ence input for external timing or holdover/freerun for
self-timing. In hard-wired manual mode, user can fast
switch using control pin SRCSW between two pre-
programmed reference inputs. The reference input
elected from the auto reference elector will not affect
the selected reference input in manual or hard-wired
manual mode.
In manual reference selection mode, the timing gen-
erator T4 may accept T0’s synchronized output as its
input.
External Frame Sync Inputs
The STC5455 has three external frame sync inputs at
2kHz or 8kHz on the pin EX_SYNC1, EX_SYNC2,
and EX_SYNC3 respectively. The frequency of the
external frame sync inputs are auto-detected.
To achieve frame alignment, any one of the three
external sync inputs may be selected as frame refer-
ence for T0 selected REF1 to REF5 individually.
Reference Inputs
The STC5455 accepts 5 reference inputs. 3 LVCMOS
Preliminary
Page 14 of 56 TM121 Rev: P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011