SAMA5D41_14 Datasheet, PDF (884/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

35.4 Typical Connection
Figure 35-2. Board Schematic
(1)
22k Ω
15k Ω ⁽¹⁾
"B" Receptacle
1 = VBUS
2 = D-
3 = D+
4 = GND
12
C_RPB
34
Shell = Shield
C_RPB:1μF to 10μF
PIO (VBUS DETECT)
DHSDM/DFSDM
5K62 ± 1%Ω
10 pF
DHSDP/DFSDP
VBG
GNDUTMI
Note: The values shown on the 22 kΩ and 15 kΩ resistors are only valid with 3V3 supplied PIOs.
35.5 Product Dependencies
35.5.1 Power Management
The UDPHS is not continuously clocked.
For using the UDPHS, the programmer must first enable the UDPHS Clock in the Power Management Controller
Peripheral Clock Enable Register (PMC_PCER). Then enable the PLL in the PMC UTMI Clock Configuration
Register (CKGR_UCKR). Finally, enable BIAS in CKGR_UCKR.
However, if the application does not require UDPHS operations, the UDPHS clock can be stopped when not
needed and restarted later.
35.5.2 Interrupt
The UDPHS interrupt line is connected on one of the internal sources of the Interrupt Controller. Using the UDPHS
interrupt requires the Interrupt Controller to be programmed first.
Table 35-1. Peripheral IDs
Instance
ID
UDPHS
47
884
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14