SAMA5D41_14 Datasheet, PDF (171/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

17.3.5 EBI Configuration Register
Name:
SFR_EBICFG
Address: 0xF8028040
Access:
Read/Write
31
30
29
–
–
–
23
22
21
–
–
–
15
14
13
–
–
–
7
6
5
–
–
–
28
–
20
–
12
SCH1
4
SCH0
27
26
–
–
19
18
–
–
11
10
PULL1
3
2
PULL0
25
24
–
–
17
16
–
–
9
8
DRIVE1
1
0
DRIVE0
This register controls EBI pins which are not multiplexed with PIO controller lines.
DRIVE0, PULL0, SCH0 control EBI Data pins when applicable.
DRIVE1, PULL1, SCH1 control other EBI pins when applicable.
• DRIVEx: EBI Pins Drive Level
Drive level should be programmed depending on target frequency and board characteristics. Refer to pad characteristics
to set correct drive level.
Value
Name
Description
0
LOW
Low drive level
1
RESERVED
Low drive level
2
MEDIUM
Medium drive level
3
HIGH
High drive level
• PULLx: EBI Pins Pull Value
Value
Name
0
UP
1
NONE
2
RESERVED
3
DOWN
Description
Pull-up
No Pull
No Change (forbidden write value)
Pull-down
• SCHx: EBI Pins Schmitt Trigger
0: Schmitt Trigger off.
1: Schmitt Trigger on.
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
171