SAMA5D41_14 Datasheet, PDF (632/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

31.9.29 XDMAC Channel x [x = 0..15] Data Stride Memory Set Pattern Register
Name:
XDMAC_CDS_MSPx [x = 0..15]
Address: 0xF000407C (1)[0], 0xF00040BC (1)[1], 0xF00040FC (1)[2], 0xF000413C (1)[3], 0xF000417C (1)[4],
0xF00041BC (1)[5], 0xF00041FC (1)[6], 0xF000423C (1)[7], 0xF000427C (1)[8], 0xF00042BC (1)[9], 0xF00042FC (1)[10],
0xF000433C (1)[11], 0xF000437C (1)[12], 0xF00043BC (1)[13], 0xF00043FC (1)[14], 0xF000443C (1)[15], 0xF001407C
(0)[0], 0xF00140BC (0)[1], 0xF00140FC (0)[2], 0xF001413C (0)[3], 0xF001417C (0)[4], 0xF00141BC (0)[5], 0xF00141FC
(0)[6], 0xF001423C (0)[7], 0xF001427C (0)[8], 0xF00142BC (0)[9], 0xF00142FC (0)[10], 0xF001433C (0)[11],
0xF001437C (0)[12], 0xF00143BC (0)[13], 0xF00143FC (0)[14], 0xF001443C (0)[15]
Access:
Read/Write
31
30
29
28
27
26
25
24
DDS_MSP
23
22
21
20
19
18
17
16
DDS_MSP
15
14
13
12
11
10
9
8
SDS_MSP
7
6
5
4
3
2
1
0
SDS_MSP
• SDS_MSP: Channel x Source Data stride or Memory Set Pattern
When XDMAC_CCx.MEMSET = 0, this field indicates the source data stride.
When XDMAC_CCx.MEMSET = 1, this field indicates the memory set pattern.
• DDS_MSP: Channel x Destination Data Stride or Memory Set Pattern
When XDMAC_CCx.MEMSET = 0, this field indicates the destination data stride.
When XDMAC_CCx.MEMSET = 1, this field indicates the memory set pattern.
632
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14