SAMA5D41_14 Datasheet, PDF (133/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

For good CPU performance, it is recommended configure CPU priority with the default reset value 2 (Latency
Sensitive).
All combinations of MxPR values are allowed for all masters and slaves. For example, some masters might be
assigned the highest priority pool (round-robin), and remaining masters the lowest priority pool (round-robin), with
no master for intermediate fix priority levels.
16.10.2.1Fixed Priority Arbitration
Fixed priority arbitration algorithm is the first and only arbitration algorithm applied between masters from distinct
priority pools. It is also used in priority pools other than the highest and lowest priority pools (intermediate priority
pools).
Fixed priority arbitration allows the Bus Matrix arbiters to dispatch the requests from different masters to the same
slave by using the fixed priority defined by the user in the MxPR field for each master in the Priority Registers,
MATRIX_PRAS and MATRIX_PRBS. If two or more master requests are active at the same time, the master with
the highest priority MxPR number is serviced first.
In intermediate priority pools, if two or more master requests with the same priority are active at the same time, the
master with the highest number is serviced first.
16.10.2.2Round-robin Arbitration
This algorithm is only used in the highest and lowest priority pools. It allows the Bus Matrix arbiters to properly
dispatch requests from different masters to the same slave. If two or more master requests are active at the same
time in the priority pool, they are serviced in a round-robin increasing master number order.
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
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