SAMA5D41_14 Datasheet, PDF (1549/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

48.6.13 Register Write Protection
To prevent any single software error from corrupting ADC behavior, certain registers in the address space can be
write-protected by setting the WPEN bit in the “ADC Write Protection Mode Register” (ADC_WPMR).
If a write access to the protected registers is detected, the WPVS flag in the “ADC Write Protection Status
Register” (ADC_WPSR) is set and the field WPVSRC indicates the register in which the write access has been
attempted.
The WPVS flag is automatically reset by reading the ADC_WPSR.
The following registers can be write-protected:
 ADC Mode Register
 ADC Channel Sequence 1 Register
 ADC Channel Enable Register
 ADC Channel Disable Register
 ADC Extended Mode Register
 ADC Compare Window Register
 ADC Analog Control Register
 ADC Touchscreen Mode Register
 ADC Trigger Register
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
1549