SAMA5D41_14 Datasheet, PDF (1486/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

47.7.12 PWM Sync Channels Update Period Register
Name:
PWM_SCUP
Address: 0xF800C02C
Access:
Read/Write
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
UPRCNT
UPR
• UPR: Update Period
Defines the time between each update of the synchronous channels if automatic trigger of the update is activated
(UPDM = 1 or UPDM = 2 in PWM Sync Channels Mode Register). This time is equal to UPR+1 periods of the synchronous
channels.
• UPRCNT: Update Period Counter
Reports the value of the update period counter.
1486
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14