ATMEGA8_14 Datasheet, PDF (82/331 Pages) ATMEL Corporation – High-performance, Low-power Atmel

ATmega8(L)
The time-stamps can then be used to calculate frequency, duty-cycle, and other features of the
signal applied. Alternatively the time-stamps can be used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in Figure 34. The elements of
the block diagram that are not directly a part of the Input Capture unit are gray shaded. The
small “n” in register and bit names indicates the Timer/Counter number.
Figure 34. Input Capture Unit Block Diagram
DATA BUS (8-bit)
TEMP (8-bit)
ICRnH (8-bit)
ICRnL (8-bit)
WRITE
ICRn (16-bit Register)
TCNTnH (8-bit)
TCNTnL (8-bit)
TCNTn (16-bit Counter)
Input Capture Pin
Source
2486AA–AVR–02/2013
ICPn
ACO*
Analog
Comparator
ACIC*
ICNC
Noise
Canceler
ICES
Edge
Detector
ICFn (Int. Req.)
When a change of the logic level (an event) occurs on the Input Capture Pin (ICP1), alternatively
on the Analog Comparator Output (ACO), and this change confirms to the setting of the edge
detector, a capture will be triggered. When a capture is triggered, the 16-bit value of the counter
(TCNT1) is written to the Input Capture Register (ICR1). The Input Capture Flag (ICF1) is set at
the same system clock as the TCNT1 value is copied into ICR1 Register. If enabled (TICIE1 =
1), the Input Capture Flag generates an Input Capture interrupt. The ICF1 Flag is automatically
cleared when the interrupt is executed. Alternatively the ICF1 Flag can be cleared by software
by writing a logical one to its I/O bit location.
Reading the 16-bit value in the Input Capture Register (ICR1) is done by first reading the Low
byte (ICR1L) and then the High byte (ICR1H). When the Low byte is read the High byte is copied
into the High byte temporary register (TEMP). When the CPU reads the ICR1H I/O location it will
access the TEMP Register.
The ICR1 Register can only be written when using a Waveform Generation mode that utilizes
the ICR1 Register for defining the counter’s TOP value. In these cases the Waveform Genera-
tion mode (WGM13:0) bits must be set before the TOP value can be written to the ICR1
Register. When writing the ICR1 Register the High byte must be written to the ICR1H I/O loca-
tion before the Low byte is written to ICR1L.
For more information on how to access the 16-bit registers refer to “Accessing 16-bit Registers”
on page 77.
The main trigger source for the Input Capture unit is the Input Capture Pin (ICP1). Timer/Counter
1 can alternatively use the Analog Comparator Output as trigger source for the Input Capture
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