ATMEGA8_14 Datasheet, PDF (215/331 Pages) ATMEL Corporation – High-performance, Low-power Atmel

ATmega8(L)
Memory
Programming
Program And Data The ATmega8 provides six Lock Bits which can be left unprogrammed (“1”) or can be pro-
Memory Lock Bits ^{grammed (“0”) to obtain the additional features listed in Table 86. The Lock Bits can only be}
erased to “1” with the Chip Erase command.
Table 85. Lock Bit Byte
Lock Bit Byte
Bit No. Description
Default Value⁽¹⁾
7
–
1 (unprogrammed)
6
–
1 (unprogrammed)
BLB12
5
Boot lock bit
1 (unprogrammed)
BLB11
4
Boot lock bit
1 (unprogrammed)
BLB02
3
Boot lock bit
1 (unprogrammed)
BLB01
2
Boot lock bit
1 (unprogrammed)
LB2
1
Lock bit
1 (unprogrammed)
LB1
0
Lock bit
1 (unprogrammed)
Note: 1. “1” means unprogrammed, “0” means programmed
Table 86. Lock Bit Protection Modes⁽²⁾
Memory Lock Bits
Protection Type
LB Mode
LB2
LB1
1
1
1
No memory lock features enabled
Further programming of the Flash and EEPROM is
2
1
0
disabled in Parallel and Serial Programming mode. The
Fuse Bits are locked in both Serial and Parallel
Programming mode ⁽¹⁾
Further programming and verification of the Flash and
3
0
0
EEPROM is disabled in parallel and Serial Programming
mode. The Fuse Bits are locked in both Serial and Parallel
Programming modes ⁽¹⁾
BLB0 Mode BLB02 BLB01
1
1
1
No restrictions for SPM or LPM accessing the Application
section
2
1
0
SPM is not allowed to write to the Application section
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
3
0
0
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section
LPM executing from the Boot Loader section is not
4
0
1
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section
2486AA–AVR–02/2013
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