ATMEGA8_14 Datasheet, PDF (175/331 Pages) ATMEL Corporation – High-performance, Low-power Atmel

ATmega8(L)
Master Receiver Mode
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(see Figure 80). In order to enter a Master mode, a START condition must be transmitted. The
format of the following address packet determines whether Master Transmitter or Master
Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is trans-
mitted, MR mode is entered. All the status codes mentioned in this section assume that the
prescaler bits are zero or are masked to zero.
Figure 80. Data Transfer in Master Receiver Mode
V_CC
Device 1
Device 2
MASTER
SLAVE
Device 3 ........ Device n
R1
R2
RECEIVER
TRANSMITTER
SDA
SCL
A START condition is sent by writing the following value to TWCR:
TWCR
value
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
–
1
X
1
0
X
1
0
TWIE
X
TWEN must be written to one to enable the Two-wire Serial Interface, TWSTA must be written to
one to transmit a START condition and TWINT must be set to clear the TWINT Flag. The TWI
will then test the Two-wire Serial Bus and generate a START condition as soon as the bus
becomes free. After a START condition has been transmitted, the TWINT Flag is set by hard-
ware, and the status code in TWSR will be 0x08 (see Table 66 on page 173). In order to enter
MR mode, SLA+R must be transmitted. This is done by writing SLA+R to TWDR. Thereafter the
TWINT bit should be cleared (by writing it to one) to continue the transfer. This is accomplished
by writing the following value to TWCR:
TWCR
value
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
–
1
X
0
0
X
1
0
TWIE
X
When SLA+R have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x38, 0x40, or 0x48. The appropriate action to be taken for each of these status codes
is detailed in Table 67 on page 176. Received data can be read from the TWDR Register when
the TWINT Flag is set high by hardware. This scheme is repeated until the last byte has been
received. After the last byte has been received, the MR should inform the ST by sending a
NACK after the last received data byte. The transfer is ended by generating a STOP condition or
a repeated START condition. A STOP condition is generated by writing the following value to
TWCR:
TWCR
value
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
–
1
X
0
1
X
1
0
TWIE
X
A REPEATED START condition is generated by writing the following value to TWCR:
TWCR
value
TWINT
TWEA
TWSTA
TWSTO
TWWC
TWEN
–
1
X
1
0
X
1
0
TWIE
X
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