ATMEGA8_14 Datasheet, PDF (211/331 Pages) ATMEL Corporation – High-performance, Low-power Atmel

ATmega8(L)
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
Bits to prevent any Boot Loader software updates
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V_CC Reset Protection circuit can
be used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient
3. Keep the AVR core in Power-down sleep mode during periods of low V_CC. This will pre-
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCR Register and thus the Flash from unintentional writes
Programming Time for The calibrated RC Oscillator is used to time Flash accesses. Table 81 shows the typical pro-
Flash when using SPM gramming time for Flash accesses from the CPU.
Table 81. SPM Programming Time⁽¹⁾
Symbol
Min Programming Time
Flash write (page erase, page write,
and write Lock Bits by SPM)
3.7ms
Max Programming Time
4.5ms
Note: 1. Minimum and maximum programming time is per individual operation
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