ATMEGA8_14 Datasheet, PDF (182/331 Pages) ATMEL Corporation – High-performance, Low-power Atmel

ATmega8(L)
In all sleep modes other than Idle mode, the clock system to the TWI is turned off. If the TWEA
bit is set, the interface can still acknowledge its own slave address or the general call address by
using the Two-wire Serial Bus clock as a clock source. The part will then wake up from sleep
and the TWI will hold the SCL clock will low during the wake up and until the TWINT Flag is
cleared (by writing it to one). Further data transmission will be carried out as normal, with the
AVR clocks running as normal. Observe that if the AVR is set up with a long start-up time, the
SCL line may be held low for a long time, blocking other data transmissions.
Note that the Two-wire Serial Interface Data Register – TWDR does not reflect the last byte
present on the bus when waking up from these sleep modes.
Table 69. Status Codes for Slave Transmitter Mode
Status Code
(TWSR)
Prescaler Bits
are 0
0xA8
Status of the Two-wire Serial Bus
and Two-wire Serial Interface
Hardware
Own SLA+R has been received;
ACK has been returned
Application Software Response
To/from TWDR
To TWCR
STA STO TWINT
Load data byte or
X
0
1
Load data byte
X
0
1
0xB0
Arbitration lost in SLA+R/W as Load data byte or
X
0
1
Master; own SLA+R has been
received; ACK has been returned Load data byte
X
0
1
0xB8
Data byte in TWDR has been
Load data byte or
X
0
1
transmitted; ACK has been
received
Load data byte
X
0
1
0xC0
Data byte in TWDR has been
No TWDR action or
0
0
1
transmitted; NOT ACK has been
received
No TWDR action or
0
0
1
No TWDR action or
1
0
1
No TWDR action
1
0
1
0xC8
Last data byte in TWDR has been No TWDR action or
0
0
1
transmitted (TWEA = “0”); ACK
has been received
No TWDR action or
0
0
1
No TWDR action or
1
0
1
No TWDR action
1
0
1
TWEA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by TWI Hardware
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
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