NPE405H Datasheet, PDF (8/70 Pages) Applied Micro Circuits Corporation – PowerNP NPe405H Embedded Processor

NPe405H – PowerNP NPe405H Embedded Processor
Revision 1.01 – April 18, 2007
Data Sheet
DCR ADDRESS MAP
Table 2. DCR Address Map 4KB Device Configuration Register
DCR address space1
Function
Start
0x000
End
0x3FF
Size
1KW (4KB)¹
Reserved
0x000
0x00F
16W
Memory controller registers
0x010
0x011
2W
External bus controller registers
0x012
0x013
2W
Reserved
0x014
0x07F
108W
PLB registers
0x080
0x08F
16W
Performance counters
0x090
0x091
2W
Reserved
0x092
0x09F
14W
OPB bridge-out registers
0x0A0
0x0A7
8W
Reserved
0x0A8
0x0AF
8W
Clock, control and reset
0x0B0
0x0B7
8W
Power management
0x0B8
0x0BF
8W
Interrupt controller 0
0x0C0
0x0CF
16W
Interrupt controller 1
0x0D0
0x0DF
16W
Reserved
0x0E0
0x0EF
16W
Miscellaneous
0x0F0
0x0FF
16W
DMA controller registers
0x100
0x13F
64W
Reserved
0x140
0x17F
64W
MAL0 registers (Ethernet)
0x180
0x1FF
128W
MAL1 registers (HDLCEX)
0x200
0x27F
128W
MAL2 registers (HDLCMP)
0x280
0x2FF
128W
Reserved
0x300
0x3FF
256W
Notes:
1. DCR address space is addressable with up to 10 bits (1024 or 1K unique addresses). Each unique address represents a single 32-bit (word) register, or 1 kiloword (KW) (which
equals 4 KB).
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