EPF8452ATC100-4N Datasheet, PDF (49/62 Pages) Altera Corporation – Programmable Logic Device Family

FLEX 8000 Programmable Logic Device Family Data Sheet
Table 46. EPF81500A I/O Element Timing Parameters
Symbol
t _IOD
t _IOC
t _IOE
t _IOCO
t _IOCOMB
t _IOSU
t _IOH
t _IOCLR
t _IN
t _OD1
t _OD2
t _OD3
t_XZ
t _ZX1
t _ZX2
t _ZX3
Speed Grade
Unit
A-2
A-3
A-4
Min
Max
Min
Max
Min
Max
0.7
0.8
0.9
ns
1.7
1.8
1.9
ns
1.7
1.8
1.9
ns
1.0
1.0
1.0
ns
0.3
0.2
0.1
ns
1.4
1.6
1.8
ns
0.0
0.0
0.0
ns
1.2
1.2
1.2
ns
1.5
1.6
1.7
ns
1.1
1.4
1.7
ns
1.6
4.6
1.9
4.9
2.2
ns
5.2
ns
3
1.4
1.6
1.8
ns
1.4
1.6
1.8
ns
1.9
2.1
2.3
ns
4.9
5.1
5.3
ns
Table 47. EPF81500A Interconnect Timing Parameters
Symbol
t _LABCASC
t _LABCARRY
t _LOCAL
t _ROW
t _COL
t _{DIN_C}
t _{DIN_D}
t _{DIN_IO}
A-2
Min
Max
0.3
0.3
0.5
6.2
3.0
5.0
8.2
5.0
Speed Grade
A-3
Min
Max
0.3
0.3
0.6
6.2
3.0
5.0
8.2
5.0
Unit
A-4
Min
Max
0.4
ns
0.4
ns
0.8
ns
6.2
ns
3.0
ns
5.5
ns
8.7
ns
5.5
ns
Altera Corporation
49