EPF8452ATC100-4N Datasheet, PDF (42/62 Pages) Altera Corporation – Programmable Logic Device Family

FLEX 8000 Programmable Logic Device Family Data Sheet
Table 32. EPF8452A LE Timing Parameters
Symbol
t _LUT
t _CLUT
t _RLUT
t _GATE
t _CASC
t _CICO
t _CGEN
t _CGENR
t_C
t _CH
t _CL
t _CO
t _COMB
t _SU
t_H
t _PRE
t _CLR
A-2
Min
Max
2.0
0.0
0.9
0.0
0.6
0.4
0.4
0.9
1.6
4.0
4.0
0.4
0.4
0.8
0.9
0.6
0.6
Speed Grade
A-3
Min
Max
2.3
0.2
1.6
0.0
0.7
0.5
0.9
1.4
1.8
4.0
4.0
0.5
0.5
1.0
1.1
0.7
0.7
Table 33. EPF8452A External Timing Parameters
Symbol
t _DRR
t_ODH
A-2
Min
Max
16.0
1.0
Speed Grade
A-3
Min
Max
20.0
1.0
Unit
A-4
Min
Max
3.0
ns
0.1
ns
1.6
ns
0.0
ns
0.9
ns
0.6
ns
0.8
ns
1.5
ns
2.4
ns
4.0
ns
4.0
ns
0.6
ns
0.6
ns
1.1
ns
1.4
ns
0.8
ns
0.8
ns
Unit
A-4
Min
Max
25.0
ns
1.0
ns
42
Altera Corporation