AK5366VR Datasheet, PDF (33/42 Pages) Asahi Kasei Microsystems – 24-Bit 48kHz ΔΣ ADC with Selector/PGA/ALC

ASAHI KASEI
[AK5366VR]
„ Control by Pin and Bit
Function
Input Selector
Soft Mute
Pin
SEL2-0 Pin
“LLL” : LIN1/RIN1
“LLH” : LIN2/RIN2
“LHL” : LIN3/RIN3
“LHH” : LIN4/RIN4
“HLL” : LIN5/RIN5
SMUTE Pin
(Internal Pull-down)
“L” : Normal operation
“H” : Soft muted
Table 13. Pin and Bit control
bit
SEL2-0 bit
“000” : LIN1/RIN1
“001” : LIN2/RIN2
“010” : LIN3/RIN3
“011” : LIN4/RIN4
“100” : LIN5/RIN5
SMUTE bit
“0” : Normal operation
“1” : Soft muted
Note : The SEL2-0 pins should be fixed to “LLL” if the AK5366VR is controlled by the SEL2-0 bits, because the setting
of the
SEL2-0 pins are prior to the SEL2-0 bits setting. Soft Mute is ORed between pin and register.
„ Register Map
Addr
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
Register Name
Power Down & Reset Control
Input Selector Control
Clock & Format Control
Timer Select
Lch IPGA Control
Rch IPGA Control
ALC Mode Control 1
ALC Mode Control 2
Lch DATT Control
Rch DATT Control
Lch Peak Hold Low Byte
Lch Peak Hold High Byte
Rch Peak Hold Low Byte
Rch Peak Hold High Byte
D7
0
0
0
0
IPGL7
IPGR7
0
REF7
ATTL7
ATTR7
PHL7
PHL15
PHR7
PHR15
D6
0
0
0
0
IPGL6
IPGR6
0
REF6
ATTL6
ATTR6
PHL6
PHL14
PHR6
PHR14
D5
0
0
0
LTM1
IPGL5
IPGR5
ZELMN
REF5
ATTL5
ATTR5
PHL5
PHL13
PHR5
PHR13
D4
0
0
0
LTM0
IPGL4
IPGR4
ALC
REF4
ATTL7
ATTR4
PHL4
PHL12
PHR4
PHR12
D3
0
0
DIF
ZTM1
IPGL3
IPGR3
FR
REF3
ATTL7
ATTR3
PHL3
PHL11
PHR3
PHR11
D2
MCKPD
SEL2
CKS1
ZTM0
IPGL2
IPGR2
LMTH
REF2
ATTL7
ATTR2
PHL2
PHL10
PHR2
PHR10
D1
MCKAC
SEL1
CKS0
WTM1
IPGL1
IPGR1
RATT
REF1
ATTL7
ATTR1
PHL1
PHL9
PHR1
PHR9
D0
PWN
SEL0
SMUTE
WTM0
IPGL0
IPGR0
LMAT
REF0
ATTL0
ATTR0
PHL0
PHL8
PHR0
PHR8
PDN pin = “L” resets the registers to their default values.
Note: Unused bits must contain a “0” value.
Note: Only write to address 00H to 09H.
Note: 3-wire serial control does not support Read function. I2C control supports Read function.
MS0526-E-00
- 33 -
2006/07