AK5366VR Datasheet, PDF (23/42 Pages) Asahi Kasei Microsystems – 24-Bit 48kHz ΔΣ ADC with Selector/PGA/ALC

ASAHI KASEI
[AK5366VR]
„ Input Volume
The AK5366VR includes two independent channel analog volumes (IPGA) with 37 levels at 0.5dB steps located in front
of the ADC.
The IPGA is a true analog volume control that improves the S/N ratio as seen in Table 9. Independent zero-crossing
detection is used to ensure level changes only occur during zero-crossings. If there are no zero-crossings, the level will
then change after a time-out period (Table 10); the time-out period scales with fs. If a new value is written to the IPGA
register before the IPGA changes at the zero crossing or time-out, the previous value becomes invalid. The timer (channel
independent) for time-out is reset and the timer restarts for new IPGA value.
Input Gain Setting
0dB
+6dB
fs=48kHz, A-weight
103dB
100dB
Table 9. PGA+ADC S/N
+18dB
89dB
ZTM1
0
0
1
1
ZTM0
0
1
0
1
Zero crossing timeout period @fs=48kHz
288/fs
6ms
1152/fs
24ms
2304/fs
48ms
4608/fs
96ms
Table 10. Zero crossing timeout period
Default
[Writing operation at ALC Enable]
Writing to the area over 7FH (Table 17) of IPGL/R registers (04H, 05H) is ignored during ALC operation. After ALC
is disabled, the IPGA changes to the last written data by zero-crossing or time-out. In case of writing to the DATT area
(08H, 09H), the DATT changes even if ALC is enabled.
„ Output Volume
The AK5366VR includes two independent channel digital volumes (DATT) with 144 levels at 0.5dB steps located behind
the ADC. When changing levels, transitions are executed via soft changes; thus no switching noise occurs during these
transitions. The data must not be written over 90H.
ATTL/R7-0 Attenuation
8FH
+8.0dB
8EH
+7.5dB
:
:
81H
+1.0dB
80H
+0.5dB
7FH
0dB
Default
7EH
−0.5dB
7DH
−1.0dB
:
:
02H
−62.5dB
01H
−63dB
00H
Mute (−∝)
Table 11. DATT Code Table
MS0526-E-00
- 23 -
2006/07